2022 微电子制造技术（英文）(哈尔滨工业大学（威海）) 最新满分章节测试答案

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本课程起止时间为:2022-04-19到2022-07-10

Chapter 1 Unit test 1

1、 问题:Integrated resistors can be

选项：
A:patterned resistor material layers with well-defined geometry on a piece of Si wafer.
B:np junctions fabricated on a piece of Si wafer.
C:np junctions fabricated on a resistor material layer.
D:individual resistor wires bonded to a piece of Si.
答案: 【individual resistor wires bonded to a piece of Si.】

2、 问题:The base region of a BJT has to be (   ) enough and (   ) doped to make sure that recombination in the base region is minimized.
选项：
A:thin, lightly
B:thick, lightly
C:thin, heavily
D:thick, heavily
答案: 【thin, lightly】

3、 问题:Microelectronic fabrication refers to the process steps from
选项：
A:"silicon wafers" to " wafers with IC circuit structures"
B:"silicon boules" to " commercial IC products"
C:"silicon wafers" to " commercial IC products "
D:"silicon boules" to " wafers with IC circuit structures"
答案: 【"silicon wafers" to " wafers with IC circuit structures"】

4、 问题:A bipolar junction transistor (BJT) can be
选项：
A:two pn junctions sharing a thin p-doped region.
B:two pn junctions sharing a thin n-doped region.
C:three n-type or p-type regions close to each other.
D:either a PNP or NPN type.
答案: 【two pn junctions sharing a thin p-doped region.;
two pn junctions sharing a thin n-doped region.】

5、 问题:Challenges in future development of the microelectronic fabrication include:
选项：
A:how to decrease feature sizes further
B:how to handle the complexity of multifunctional devices
C:how to design and test ICs of ULSI
D:how to grow single-crystal Si boules
答案: 【how to decrease feature sizes further;
how to handle the complexity of multifunctional devices;
how to design and test ICs of ULSI;
how to grow single-crystal Si boules】

6、 问题:Which of the following processes are included in the planar processes?
选项：
A:Thermal oxidation & doping
B:Chip performance test
C:Photolithography
D:Aluminum thin film deposition
答案: 【Thermal oxidation & doping;
Photolithography;
Aluminum thin film deposition】

7、 问题:Device miniaturization and high density integration can provide
选项：
A:more functions per area.
B:better performance.
C:lower power consumption.
D:lower cost.
答案: 【better performance.;
lower power consumption.;
lower cost.】

8、 问题:Usually, an NPN type BJT is fabricated on a heavily-doped (           )-type Si wafer.
答案: 【(以下答案任选其一都对)n;
N】

9、 问题: is the sign of (    ) transistors.
答案: 【(以下答案任选其一都对)NPN;
npn】

Chapter 2 Unit test 2

1、 问题:The segregation coefficient of phosphor is 0.35. The resistivity of a CZ Si boule doped by the liquid phase direct doping method
选项：
A:is axially uniform.
B:is decreasing radially.
C:is increasing axially from head to tail.
D:is decreasing axially from head to tail.
答案: 【is decreasing axially from head to tail.】

2、 问题:Which of the following statements about CZ growth processes is true?
选项：
A:To improve the quality of CZ crystals, it is necessary to use the grown rate as high as possible.
B:No temperature gradient is present in the melt.
C:CZ crystals can be doped by adding dopants directly in the melt.
D:Si crystals nucleate within the bulk melt.
答案: 【CZ crystals can be doped by adding dopants directly in the melt.】

3、 问题:The necking step in a CZ process is made in order to obtain an ingot
选项：
A:with the same orientation as the seed crystal.
B:free of dislocations propagating into the growing ingot from the seed.
C:free of impurities.
D:with constant diameter.
答案: 【free of dislocations propagating into the growing ingot from the seed.】

4、 问题:Practically dopants used in Si to adjust its electrical properties are
选项：
A:intentionally introduced into the material.
B:unintentionally introduced into the material.
C:in most cases substitutional impurities.
D:in most cases interstitial impurities.
答案: 【intentionally introduced into the material.;
in most cases substitutional impurities.】

5、 问题:Point defects in Si crystals include
选项：
A:dopant atoms doped in the lattice.
B:charged vacancies.
C:nano voids in the matrix.
D:impurity atoms exist in interstitial sites.
答案: 【dopant atoms doped in the lattice.;
charged vacancies.;
impurity atoms exist in interstitial sites.】

6、 问题:Which of the following statements is true?
选项：
A:Climb is one of the major mechanisms for dislocation motion.
B:Vacancies are point defects fixed in the lattice.
C:In order to adjust the electrical properties of Si, it is necessary to incorporate as many dopants as possible into the lattice.
D:Stacking faults in Si crystals usually lie in {111} planes.
答案: 【Climb is one of the major mechanisms for dislocation motion.;
Stacking faults in Si crystals usually lie in {111} planes.】

7、 问题:In order to suppress melt convection during CZ growth processes,
选项：
A:magnetically confined Czochralski growth can be used.
B:float-zone growth method can be used.
C:a growth chamber in microgravity can be used.
D:the melt temperature should be as high as possible.
答案: 【magnetically confined Czochralski growth can be used.;
a growth chamber in microgravity can be used.】

8、 问题:The total number of Si atoms contained in each unit cell is (              ). The APF of the diamond lattice is (       ). The atomic number density of a Si crystal is (               ) atoms/cm3. (Separate the answers by ";")
答案: 【(以下答案任选其一都对)8;0.34;5e22;
8;0.34;5×10^22】

Chapter 3 Unit test 3

1、 问题:A dual diffusion process is applied for fabricating Si-based ICs. The predeposition step is made at 1200 ℃ for 50 min. The drive-in step is made at 950 ℃ for 30 min. The dopant profile can be approximated by
选项：
A:a Gaussian function.
B:a complementary error function.
C:a Gaussian function superimposed on a complementary error function.
D:none of the above.
答案: 【none of the above.】

2、 问题:Which of the following statements is true for a dual diffusion process?
选项：
A:The predeposition step is a constant-surface-concentration diffusion process.
B:The predeposition step is a constant-total-dose diffusion process.
C:The drive-in step is a constant-surface-concentration diffusion process.
D:The drive-in step is a constant-total-dose diffusion process.
答案: 【The predeposition step is a constant-surface-concentration diffusion process.;
The drive-in step is a constant-total-dose diffusion process.】

3、 问题:Which of the following statements is true for diffusion processes?
选项：
A:Diffusion chambers must be sealed.
B:Wafers can be loaded horizontally or vertically in the furnace.
C:Dopant can be provided in the form of gas, liquid or solid.
D:Dopant must be provided in the form of oxides.
答案: 【Wafers can be loaded horizontally or vertically in the furnace.;
Dopant can be provided in the form of gas, liquid or solid.】

4、 问题:Vacancies, interstitial atoms and impurities all have large influences on dopant diffusion. Among them, vacancies have the greatest influence on diffusion of dopants like phosphorous and boron.
选项：
A:正确
B:错误
答案: 【正确】

5、 问题:A one-step diffusion process is made for 75 min. The measured junction depth is 1.5 μm. How long will it take to obtain a junction depth of 2.1μm by the same process? (      ) min.
答案: 【147】

6、 问题:A one-step diffusion process is made for 5 min. The measured junction depth is 0.5 μm. In order to make the junction 1 μm deep, the same diffusion process has to run for another (           ) min.
答案: 【15】

Chapter 4 Unit test 4

1、 问题:Which of the following statements is true about ion implantation?
选项：